Reimagining Computing Chips: Adopting a New Mindset for Sustainability in the Age of AI
The pervasive role of electronic systems in our daily lives is undeniable. From smartphones and computers to televisions and coffee machines, modern life relies heavily on electronics and the internet. Without these technologies, business operations would grind to a halt, educational quality would decline, and daily life would regress to pre-industrial standards. However, this dependence comes at a significant and growing cost, particularly with the rise of power-hungry applications like Artificial Intelligence (AI). For instance, energy forecasts predict that the electricity demand for ICT systems will exceed 20% of global electricity consumption by 2030, driven by data centers, smartphones, computers, and networks. This highlights the urgent need to design and use these systems in an energy-efficient manner, not only to reduce ICT’s environmental footprint and ensure sustainability but also to enable emerging energy-constrained applications, such as edge AI. This talk will explore the current state of chip technology and computer hardware architectures, which form the backbone of ICT systems, and examine their limitations in achieving the energy efficiency required for a sustainable future. It will address both device-level and architectural challenges, emphasizing the need for innovative solutions. A particular focus will be on dedicated hardware architectures for AI, such as Computation-In-Memory (CIM) architectures that leverage emerging memristor devices as well traditional SRAM technology, and draw inspiration from the human brain. The immense potential of CIM, capable of delivering over 100x improvements in energy efficiency, will be illustrated through real-world case studies and experimental data from chip prototypes for different technology flavours. Additionally, key aspects related to the design, testing, and reliability of brain-inspired CIM architectures will be discussed, along with future challenges in chip technology and computer hardware design.
Said Hamdioui (http://www.ce.ewi.tudelft.nl/hamdioui) is Chair Professor of Dependable and Emerging Computer Technologies and Head of the Computer Engineering Laboratory at Delft University of Technology (TU Delft), Netherlands.His research spans emerging technologies and computing paradigms, such as in-memory and brain-inspired computing, as well as hardware dependability, including testability, reliability, and security. Before joining academia, he gained extensive industry experience, working with the Microprocessor Products Group at Intel Corporation (California, USA), the IP and Yield Group at Philips Semiconductors R&D (Crolles, France), and the DSP Design Group at Philips/NXP Semiconductors (Nijmegen, Netherlands). Hamdioui holds four patents, authored one book, contributed to two others, and published over 330 peer-reviewed papers. He has provided consulting and training for leading semiconductor companies, including Intel, NXP, STMicroelectronics, Renesas, and Huawei, with a focus on digital integrated circuit testing and design-for-test. Additionally, he has collaborated extensively with top academic and industrial partners such as IBM, IMEC, Cadence, the European Space Agency, ETH Zurich, and Politecnico di Torino. His contributions have significantly advanced the fields of chip design, semiconductors, and Electronic Design Automation (EDA). Hamdioui is an active contributor to the international research community, serving on organizing and technical program committees for leading conferences. He has delivered numerous keynote speeches, distinguished lectures, and invited tutorials at major forums, conferences, and semiconductor companies. His editorial roles include Associate Editor for IEEE Transactions on VLSI Systems (2015–2018), and editorial contributions to the Microelectronics Reliability Journal (2019–2020) and JETTA (2011–2019). He currently serves on the editorial boards of the ACM Journal on Emerging Technologies in Computing Systems (2020–present) and IEEE Design & Test (2013–present). Hamdioui has received numerous awards, including the EDAA Outstanding Dissertation Award (2001) for his pioneering work on memory testing, the European Commission Innovation Award (2020) for the H2020 MNEMOSENE project on energy-efficient computing, and HiPEAC Technology Transfer Awards (2015, 2022). He was also recognized as the Best Tech Idea of the Netherlands (2021), received over 20 Best Paper Awards and nominations at prestigious conferences like DATE, ITC, and ETS, and was named Teacher of the Year (2017) at TU Delft. He is an IEEE Circuits and Systems Society Distinguished Lecturer (2021–2022) and a key member of the Cadence Academic Network on Dependability and Design-for-Testability. Ranked among the World’s Top 2% Scientists (Stanford & Elsevier 2024), he is a Fellow of the Netherlands Academy of Engineering and a Senior Member of IEEE. Hamdioui also serves on the AENEAS/ENIAC Scientific Committee and advisory boards for Khalifa University (UAE) and the Graduate School for Intelligent Methods for Test and Reliability, a collaboration between Advantest and the University of Stuttgart.
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